Jeff:
Your math is incorrect. In both calculations, you forget to convert from bits to bytes (8 bits = 1 byte). Also, you’re not considering memory paging. Without paging, x86 processors using a 32 bit address word can only access 0.5 GB of memory. See http://spreadsheets.google.com/ccc?key=pYK6MlUiNyheNUOvbGxggNQhl=en_US for the math. NOTE: Clicking the sheet names at the bottom displays different calculation sets.
FWIW, I completely agree with Ian (and others) when he says that the issue isn’t quite as facile as Jeff’s thesis makes it seem. Look at Mac OS X: it’s (now) a 64bit kernal, but the maximum amount of RAM a MacBookPro will take is 4GB, while a MacBook will only handle 3GB. The MacPros, however, handle up to 16GB of RAM. Different chip set, same OS = different specs. Apple simply didn’t include the extra hardware to allow higher memory configurations.
Jae:
x86 is a processor architecture. ‘Nbit’ (where N is 16, 32, 64, etc) refers to the word size a processor operates on. x86 processors began with 16bit word sizes, moved to 32 and are moving to 64.
One (very inexact) way to think about it is to say that CPUs are like internal combustion engines. They may differ in how the bits fit together, how many bits there are or even how quickly they do their jobs. But, basically, they’re all pretty much alike: fuel comes in, combustion happens, piston moves, and wheels turn.
Word size can be likened to the amount of pistons an engine has; more pistons means more fuel is combusted (work is done) every cycle. Also, relevant to the above discussion, larger word size means more physical address lines are available (32 more, in this case). See above link for the math behind this.